发明名称 Methods of testing integrated circuitry
摘要 A method of testing integrated circuitry includes providing a substrate comprising integrated circuitry to be tested. The circuitry substrate has a plurality of exposed conductive bumps in electrical connection with the integrated circuitry. At least one of the conductive bumps is engaged with an opening of a conductive receptacle at least partially formed in a surface of a test substrate. Thereafter, at least a portion of the receptacle is heated to a temperature greater than 125° C. and within at least 50% in degrees centigrade of and below the melting temperature of the exposed conductive bump effective to deform the engaged bump to be received more fully within the receptacle than initially so received by the engaging. The bumped circuit is tested through the engaged bump deformed within the receptacle. Thereafter, the bump is removed from the receptacle.
申请公布号 US6628133(B2) 申请公布日期 2003.09.30
申请号 US20020305676 申请日期 2002.11.26
申请人 MICRON TECHNOLOGY, INC. 发明人 AKRAM SALMAN
分类号 G01R1/04;G01R31/28;H05K3/32;(IPC1-7):G01R1/073 主分类号 G01R1/04
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