发明名称 Method and apparatus for binary encoding logic circuits
摘要 A method and apparatus for state assignment of a logic circuit comprises receiving internal state representations for the logic circuit, determining binary code for the internal state representations by successively dividing the states into disjoint sets of ever decreasing size Each disjoint set of a pair is assigned a one bit at each division step. The division can continue for all bits to be encoded, or the division can be halted and exact encoding used for the encoding of the final number of bits.
申请公布号 US6628215(B2) 申请公布日期 2003.09.30
申请号 US20010771922 申请日期 2001.01.29
申请人 AUTOMATIC PARALLEL DESIGN LIMITED 发明人 TALWAR SUNIL;MEULEMANS PETER
分类号 G06F17/50;(IPC1-7):H03M5/00;H03M7/00 主分类号 G06F17/50
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