Method of manufacturing non volatile memory device having two charge storage regions

摘要

A method of manufacturing a semiconductor device having the memory region which has a MONOS type memory cell and a logic circuit region which has a peripheral circuit, including the following steps. A stopper layer and a predetermined region of a first conductive layer within the memory region are patterned, but a stopper layer and a first conductive layer within the logic circuit region are not pattered. Side-wall shaped control gates are formed at least on both sides of the first conductive layer within the memory region with an ONO film interposed. The first conductive layer within the logic circuit region is patterned to form a gate electrode of a MOS transistor. Surfaces of gate electrodes and source or drain regions of the non-volatile memory device and the MOS transistor are silicided. After a second insulating layer is formed, the second insulating layer is polished so that the stopper layer within the memory region is exposed and the gate electrode within the logic circuit region is not exposed.