| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide an asynchronous semiconductor memory device which can realize high speed of a system, an internal control method and a system for the asynchronous semiconductor memory device. <P>SOLUTION: An asynchronous memory device 11 inputs a start address ADS and a finish address ADE after input of a command in the read-operation. An address generating circuit 27 outputs a generated address AD generated any time from the start address ADS based on a read-enable signal REB to a Hi-Z control circuit 28, an address comparator 28a of the Hi-Z control circuit 28 compares successively its generated address with the finish address ADE. When values of the addresses AD, ADE are coincident, the Hi-Z control circuit 29 outputs a Hi-Z control signal SHZ to an I/O control circuit 21, thereby, an I/O terminal is controlled in a Hi-Z state. <P>COPYRIGHT: (C)2003,JPO</p> |
