发明名称 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
摘要 A dose of arsenic for an extension region in an NMOS transistor is in a range from 5x10<SUP>14 </SUP>to 2x10<SUP>15 </SUP>ions/cm<SUP>2 </SUP>and preferably in a range from 1.1x10<SUP>15 </SUP>to 1.5x10<SUP>15 </SUP>ions/cm<SUP>2</SUP>. Also, in addition to arsenic, a low concentration of phosphorus is doped into the extension region by ion implantation. Consequently, with a semiconductor device of the CMOS structure, it is possible to prevent unwanted creeping of silicide that occurs often in the shallow junction region depending on a concentration of an impurity having a low diffusion coefficient as represented by arsenic. Further, not only can the resistance in the shallow junction region be lowered, but also an amount of overlaps can be optimized in each transistor.
申请公布号 KR20030076174(A) 申请公布日期 2003.09.26
申请号 KR20020066093 申请日期 2002.10.29
申请人 发明人
分类号 H01L27/092;H01L21/336;H01L21/8238;H01L29/78 主分类号 H01L27/092
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