| 摘要 |
<P>PROBLEM TO BE SOLVED: To simplify a circuit by lowering a clock frequency in pulse width modulation even when expressing the same one gradation. <P>SOLUTION: This image processor is provided with an image forming means 1 capable of printing input image data in a subscanning direction in resolution m (m is natural number of 2 or more) times as high as the main scanning direction of the input image data, an image converting means 2 for converting image data of n (n is even number of 2 or more) gradation with area gradation along the main scanning direction in one pixel into m pixels in n/m gradation with area gradation in the main scanning direction, and an image controlling means 3 for allocating data converted by the image converting means for m pixels to the subscanning direction in printing by the image forming means. <P>COPYRIGHT: (C)2003,JPO |
