发明名称 MULTIPROCESSOR, MULTIPROCESSOR CORE AND CONTROL METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To prevent a contention in a shared memory 300 in a multiprocessor 1 having processor cores 100 and 200 on one chip and the shared memory 300 accessible from the processor cores 100 and 200. <P>SOLUTION: This multiprocessor comprises the processor cores 100 and 200 and the shared memory 300 for inputting memory access signals 120 and 220 therefrom and connected thereto through data buses 110 and 210. The processor cores 100 and 200 comprise memory circuits 130 and 230 for storing memory selection flag signals 170 and 270; switching means 140 and 240 for switchingly outputting the memory selection flag signals 170 and 270 and external flag signals 150 and 250; drivers with control 190, 191, 290 and 291 for transmitting the output to the data buses 110 and 210; and memory control parts 180 and 280 for outputting the memory access signals 120 and 220 to the outside with the output of the switching means 140 and 240 and memory access addresses as input. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003271573(A) 申请公布日期 2003.09.26
申请号 JP20020072563 申请日期 2002.03.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MARUI SHINICHI
分类号 G06F15/177;G06F9/46;G06F9/52;G06F12/00;G06F15/16;G06F15/78;(IPC1-7):G06F15/177 主分类号 G06F15/177
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