| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To assert STPCLK# at fixed intervals so as to reduce an apparent CPU speed and electric current consumption. <P>SOLUTION: By asserting STPCLK# at fixed intervals, the apparent CPU speed and the electric current consumption are reduced. On the occurrence of system event (INTR, NMI, SMI, SRESET, INIT), the assertion of STPCLK# is prohibited for a given length of time, making it operate at high speed. On ISA refresh cycle, STPCLK# is asserted in stead of a conventional HOLD/HLDA cycle, thereby permitting to execute a refresh cycle in a stop grant state. <P>COPYRIGHT: (C)2003,JPO</p> |
