| 摘要 |
PROBLEM TO BE SOLVED: To provide a ferroelectric memory by which size of a memory cell block can be reduced, capacity of bit lines can be reduced and read-out signals can be increased. SOLUTION: A memory cell is composed of a cell transistor CT and a ferroelectric capacitor FC one end and the other end of whose electrode are respectively connected between a source and a drain of the cell transistor CT. The semiconductor memory device has a memory cell block MCB0 which is formed by serially connecting several memory cells, a bloc selection transistor BT0 for selecting cell blocks MCB0, a metal wire BR0 which is connected between one end of the cell block MCB0 and one end of a current path of the selection transistor BT0, a bit line /BL which is connected to the other end of the current path of the selection transistor BT0, a bit line BL which is arranged in a proximity of the bit line /BL and selection transistors BT1 and BT1' one end of whose current path is connected to the bit line BL. A gate wire of the selection transistors BT1 and BT1' is arranged below the metal wire BR0. COPYRIGHT: (C)2003,JPO
|
