发明名称 INPUT/OUTPUT CONTROL DEVICE AND COMPUTER SYSTEM
摘要 PROBLEM TO BE SOLVED: To efficiently perform a debug work at a low cost without introducing an externally attached debug device. SOLUTION: A memory write request of access address information for debug is issued to a memory controller 15 according to a DMA request from a DMAC. Namely, '(2) generation of address information' is performed before '(5) generation of an original read request' and '(3) generation of a write request of address information' is performed, to be outputted to the memory controller 15 in the memory read request of the DMA. In the memory write request of the DMA, 'generation of address information and synthesis with write data' are performed and '(3) generation of the write request' is performed, to be outputted to the memory controller 15. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003271414(A) 申请公布日期 2003.09.26
申请号 JP20020076230 申请日期 2002.03.19
申请人 RICOH CO LTD 发明人 NANBA MUTSUMI
分类号 G06F11/28;G06F13/00;G06F13/16;(IPC1-7):G06F11/28 主分类号 G06F11/28
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