| 摘要 |
PROBLEM TO BE SOLVED: To solve such a problem that in designing a functional block included in a semiconductor circuit, a standard cell is liable to be arranged inside a hard macro cell, causing ineffective improvement of the delay caused by a buffer and a wiring jam in functional blocks. SOLUTION: Basic layout patterns 1 composed of a unit block comprising a standard cell, other cells, a power supply and ground wires combined are prepared beforehand as plural kinds of library, and these basic layout patterns 1 are combined and arranged in the periphery inside a functional block 4 between functional blocks 3 and 5 when necessary for example, and then the hard macro cell 2 is arranged. Through this constitution, the delay is improved effectively, resulting in the easing of a wiring jam in the functional blocks. COPYRIGHT: (C)2003,JPO
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