发明名称 |
METHOD OF FABRICATING PCB FOR SEMICONDUCTOR PACKAGE HAVING TAILLESS PATTERN |
摘要 |
PURPOSE: A method of fabricating a PCB(Printed Circuit Board) for semiconductor package having a tailless pattern is provided to perform an electric nickel/gold plating process regardless of a design for a circuit pattern and reduce the electric noise due to a tail of a finger by forming necessary patterns without using a plating lead line. CONSTITUTION: A dry film is coated on both sides of a substrate including a copper layer. The first imaging process is performed to expose partially the copper layer corresponding to a bonding finger forming part and a solder ball land forming part. A nickel/gold plating process is performed to form a nickel/gold plating layer on the exposed copper layer. The first strip process is performed to remove the dry film. The second imaging process is performed to expose a part of the copper layer corresponding to a circuit pattern by coating, exposing, and developing the dry film. A solder plating process is performed to form a solder plating layer. The second strip process is performed to remove the dry film. An etching process is performed to remove the copper layer without the nickel/gold plating layer and the solder plating layer. The third strip process is performed to remove the solder plating layer. A solder masking process is performed to form a plastic layer on the remaining region except a soldering region.
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申请公布号 |
KR20030075824(A) |
申请公布日期 |
2003.09.26 |
申请号 |
KR20020015286 |
申请日期 |
2002.03.21 |
申请人 |
SIMM TECH CO., LTD. |
发明人 |
CHA, SANG SEOK;LEE, SEUNG HEON;YOO, MUN SANG |
分类号 |
H05K3/02;(IPC1-7):H05K3/02 |
主分类号 |
H05K3/02 |
代理机构 |
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