| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory array whose problems that the number of times of rewriting, usable ages, and a read time are restricted are solved, and which is provided with a read-timing generating circuit in which a wait signal for enabling controllable read timing is generated, and read timing of a memory can be varied with the number of times of rewriting and usable ages of the memory. <P>SOLUTION: A reference memory is arranged for each erasure, write-in unit block in an EEPROM memory array, write-in and erasure are performed for the reference memory whenever erasure and write-in are performed for memories in a block, and memory read-timing is generated from readable timing of this reference memory. Also, readable timing of the reference memory is outputted as an external interface. <P>COPYRIGHT: (C)2003,JPO |
