发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor device having a high withstand voltage by reducing parasitic capacitance between drain support substrates and relieving a high electric field generated in the vicinity of a drain. SOLUTION: This MOS transistor has a support substrate region 102 of an SOI (silicon on insulator), an embedded insulating film 140 formed on the region 102, a channel region 124 formed on the film 140, and first and second off-set regions 127 formed on the film 140 so as to be adjacent to both the sides of the regions 124. The transistor also has an impurity diffusion region formed on a portion positioned in the region 102 and below the regions 127. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003273363(A) 申请公布日期 2003.09.26
申请号 JP20020075655 申请日期 2002.03.19
申请人 SEIKO INSTRUMENTS INC 发明人 UEHARA OSAMU;OSANAI JUN
分类号 H01L21/762;H01L21/02;H01L21/265;H01L21/336;H01L21/76;H01L27/12;H01L29/786;(IPC1-7):H01L29/786 主分类号 H01L21/762
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