发明名称 MICROCOMPUTER, BUS CONTROL CIRCUIT, AND DATA ACCESS METHOD FOR MICROCOMPUTER
摘要 <p><P>PROBLEM TO BE SOLVED: To efficiently access a plurality of devices differed in access speed by use of a common bus. <P>SOLUTION: When a second access request to a second device 4 is generated from a CPU 2 during an access processing according to a first access request to a first device 3, an access completion time determination part 5a determines the antedate-postdate relation between the completion time of the access processing to the first device 3 and the earliest time of the access processing to the second device 4 can be completed. When it is determined that the access processing to the second device 4 can be completed earlier than the completion time of the access processing to the second device 4, the access to the second device 4 according to the second access request is executed by a bus access part 5b during the access processing cycle according to the first access request to the first device 3. <P>COPYRIGHT: (C)2003,JPO</p>
申请公布号 JP2003271551(A) 申请公布日期 2003.09.26
申请号 JP20020073919 申请日期 2002.03.18
申请人 FUJITSU LTD 发明人 AKASAKA NOBUHIKO
分类号 G06F12/06;G06F13/16;G06F13/36;G06F13/42;G06F15/16;G06F15/173;G06F15/78;(IPC1-7):G06F13/42 主分类号 G06F12/06
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