发明名称 BUMP MOUNTING METHOD
摘要 PROBLEM TO BE SOLVED: To narrow interval of adjacent bumps, to narrow pitch of a connection input/output pad in a substrate and to miniaturize an electronic unit without restricting the size of the tip part of a capillary. SOLUTION: In a bump mounting method, one of adjacent bumps 14 is mounted on a chip 15 and the remaining bump on a substrate 11, when the interval of the adjacent bumps among the plural bumps 14 is smaller than a fixed value Pm in the chip 15 or the substrate 11. They are mounted by using a conventional capillary. The bump 14 of a bear chip 15-side and that of a substrate 11-side are positioned alternately. The alternately arranged bumps 14 abut on counterpoised pads 12 and 13 and heat and vibration are applied. Thus, the chips can be mounted on the substrate at a pitch P smaller than a pitch Pm restricted by the capillary.
申请公布号 JP2000286290(A) 申请公布日期 2000.10.13
申请号 JP19990088107 申请日期 1999.03.30
申请人 KOKUSAI ELECTRIC CO LTD 发明人 ARAKI TARO
分类号 H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/60
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