发明名称 CLOCK SKEW COMPENSATION FOR A JITTER BUFFER
摘要 A method and system to minimize the potential of jitter buffer underflow/overflow resulting from a difference in sampling rates of an audio encoder and an audio decoder are disclosed herein. The difference in sampling rates, or clock skew, can be determined from a difference between an actual amount of data stored in a jitter buffer and the desired, or threshold, amount. A subset of packets from a sequence of packets output to the audio decoder can be altered to compensate for the clock skew, whereby the amount of data associated with the subset of packets is decreased when the sampling rate of the encoder is greater than the sampling rate of the decoder, and the amount of data is increased when the sampling rate of the encoder is less than the sampling rate of the decoder. The present invention finds particular advantage in providing audio data via a packet-switched network.
申请公布号 WO03079620(A1) 申请公布日期 2003.09.25
申请号 WO2003US07302 申请日期 2003.03.11
申请人 GLOBESPAN VIRATA INCORPORATED 发明人 TERNOVSKY, IGOR
分类号 H04L12/64;(IPC1-7):H04L12/64 主分类号 H04L12/64
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