发明名称 Locked loop with dual rail regulation
摘要 An apparatus having a dual rail regulated reference loop. The reference loop includes a delay circuit powered by upper and lower supply voltages to generate a plurality of reference clock signals, and a voltage regulation circuit to adjust the upper and lower supply voltages according to a phase difference between a selected pair of the reference clock signals.
申请公布号 US2003179027(A1) 申请公布日期 2003.09.25
申请号 US20020104230 申请日期 2002.03.22
申请人 KIZER JADE M.;LAU BENEDICT C. 发明人 KIZER JADE M.;LAU BENEDICT C.
分类号 G06F1/10;H03L7/07;H03L7/081;(IPC1-7):H03L7/06 主分类号 G06F1/10
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