摘要 |
<p>It was difficult to provide high-speed memory systems of SDRAM because, while data were bus-wired for each memory, address signals were equally wired over the entire memory chip, which resulted in heavy load and waveform distortion. Besides, the access latency was long because of address buffers. In order to realize a high-speed addressing, an address signal is wired from a memory controller to each module, and a directional coupler is used in each module. In order to realize a shorter read access latency, an address is inputted from a far end of the module in a motherboard and is daisy-chain-coupled to each memory on the module. Data are wired from the closest to the farthest of the memories in the motherboard, and the sums of the address signal propagation delay time and the data signal propagation delay time for the respective memories are equalized.</p> |