发明名称 DYNAMIC FAIL-SAFE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a dynamic fail-safe circuit. SOLUTION: The dynamic fail-safe circuit available for reducing the possibility of damage onto a circuit having a dynamic logic circuit has a specified holding timeτ<SB>hd</SB>and a nominal refresh timeτ<SB>r</SB>shorter than the holding timeτ<SB>hd</SB>under loss state of the dynamic logic circuit. The dynamic fail-safe circuit comprises a dynamic timer circuit having a holding timeτ<SB>hf</SB>, whereτ<SB>r</SB><τ<SB>hf</SB><τ<SB>hd</SB>. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003266676(A) 申请公布日期 2003.09.24
申请号 JP20030007393 申请日期 2003.01.15
申请人 XEROX CORP 发明人 BECERRA JUAN J;HAWKINS WILLIAM G;MORTON CHRISTOPHER R;CHOI YUNGRAN
分类号 B41J2/01;B41J2/045;B41J2/05;H03K19/007;(IPC1-7):B41J2/01 主分类号 B41J2/01
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