| 摘要 |
Four frequency components (f1 to f4) (where, f1<f2<f3<f4) are input into a port (10) of a first demultiplexing filter circuit (1), and demultiplexed into low frequency components (f1 and f2) and high frequency components (f3 and f4), and input in a port (20) of a second demultiplexing filter circuit (2) and a port (30) of a third demultiplexing filter circuit (3), respectively. The frequency components (f1 and f2) are demultiplexed into the component (f1) and the component (f2) by the second demultiplexing filter circuit (2), and output from a port (23) and a port (24), respectively. The frequency components (f3 and f4) are demultiplexed into the component (f3) and the component, (f4) by the third demultiplexing filter circuit (3), and output from a port (33) and a port (34), respectively. The first demultiplexing filter circuit (1) comprises a low-pass filter (11) and a high-pass filter (12), the second demultiplexing filter circuit (2) comprises a low-pass filter (21) and a combined filter (22) of a combination of a low-pass filter and a band elimination filter, and the third demultiplexing filter circuit (3) comprises a combined filter (31) of a combination of a high-pass filter and a band elimination filter and a high-pass filter (32). These demultiplexing filter circuits are formed of a stacked structure. <IMAGE> |
