| 摘要 |
The present invention provides an efficient implementation of multiprecision arithmetic, such as for a microprocessor. In one embodiment, a method includes executing a generate carry instruction on a microprocessor, the generate carry instruction determining the carry bit of the addition of a first operand and a second operand. The generate carry instruction can be executed in parallel on the microprocessor with an add (without carry) instruction of the first operand and the second operand. In one embodiment, a generate borrow instruction is similarly provided for an efficient implementation of multiprecision subtraction operations executed on the microprocessor. Accordingly, multiprecision arithmetic can be provided on a microprocessor without the use of a dedicated condition code register for the carry bit or borrow bit of multiprecision arithmetic operations.
|
