发明名称 Watermarking based protection of virtual component blocks
摘要 A system and method for protecting circuit designs from unauthorized use involves techniques for watermarking by embedding a hidden, recognizable input/output signature or code into the circuit design. An internal sequential function, such as a finite state machine, within the circuit design is used to generate a predictable output sequence when a known input sequence is applied. The free input configurations in the internal sequential function of the circuit design are identified and modified to generate the desired output sequence when the known input sequence is applied. A path among the free input configurations is selected, with output values in the desired output sequence being assigned the various state transitions. If there are not enough free input configurations to meet specified watermarking robustness criteria, then additional free input configurations may be added by, for example, adding one or more inputs, outputs or states to the finite state machine. Various techniques for arriving at an optimal path so as to minimize overhead caused by the addition of the watermark are also disclosed.
申请公布号 US6625780(B1) 申请公布日期 2003.09.23
申请号 US20000514695 申请日期 2000.02.28
申请人 CADENCE DESIGN SYSTEMS, INC. 发明人 CHARBON EDOARDO;TORUNOGLU ILHAMI H.
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址