| 摘要 |
A memory circuit capable of salvaging defective cells, comprises a plurality of memory blocks each having a plurality of memory cells, a region which stores a block address of defective memory block that has defective cell, and a comparator circuit which compares the block address that is an object of access with the block address of the defective memory block, and detects access to the defective memory block, wherein in case where the comparator circuit detects access to the defective memory block, this defective memory block is replaced by the memory block that has the uppermost address (or lowermost address) among the plurality of memory blocks. In case where a plurality of defective memory blocks are present, the defective memory blocks are replaced with substitutive memory blocks having block addresses in order from the uppermost bit (or lowermost bit).
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