发明名称 FREQUENCY MONITOR CIRCUIT, CLOCK SUPPLY DEVICE AND FREQUENCY MONITOR METHOD
摘要 <P>PROBLEM TO BE SOLVED: To provide a frequency monitor circuit, a clock supply device which can inexpensively be constructed, the maintenance of which is easy and a frequency monitor method. <P>SOLUTION: The clock supply device is provided with a data memory 9 that writes the highest digital value obtained by performing digital sampling of the highest frequency for fault judgment and the lowest digital value obtained by performing digital sampling of the lowest frequency for fault judgment and a digital value comparator circuit 10 that judges whether or not a phase comparison result digital signal 112 between the signal 110 obtained by dividing frequency of an input clock selected among a plurality of input clocks 101 to 10N and a signal 116 obtained by dividing frequency of an output clock of a voltage control oscillator 7 lies within the range between the highest digital value and the lowest digital value and when the phase comparison result digital signal 112 becomes out of the range, outputs an alarm signal 119. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003264460(A) 申请公布日期 2003.09.19
申请号 JP20020064423 申请日期 2002.03.08
申请人 NEC CORP 发明人 TANIMOTO SHINJI
分类号 H03L7/00;H03L7/08;H03L7/095;H04L29/14 主分类号 H03L7/00
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