| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a PLO control circuit for reducing the capacity of a memory for insuring a delay time in a multistage PLO pulling operation process. <P>SOLUTION: An input disconnection detection circuit 2 switches a detection signal s1 from an L level to an H level when the input disconnection detection circuit 2 detects input disconnection of an input signal f0. A first selection circuit 3 selects and outputs f1 when the detection signal s1 is at an L level and selects and outputs the input signal f0 when the detection signal s1 is at an H level. A first drift circuit 5 monitors whether there is drift in S1 and f2, and when drift is detected, the first drift circuit 5 switches a detection signal s2 from an L level to an H level. A second selection circuit 6 selects and outputs the f2 when the detection signal s2 is at an L level and selects and outputs the S1 when the detection signal s2 is at an H level. <P>COPYRIGHT: (C)2003,JPO |
