发明名称 |
DIGITAL SIGNAL COMPRESSION METHOD AND CIRCUIT, AND DIGITAL SIGNAL EXPANSION METHOD AND CIRCUIT |
摘要 |
PROBLEM TO BE SOLVED: To provide a digital signal compression method and circuit capable of furthermore reducing an information quantity in an image signal before compression and to provide a digital signal expansion method and circuit. SOLUTION: This digital signal compression circuit include: a basic frame memory 19 for storing basic frames; a subtractor 1 for receiving an image signal as one of inputs; an intra/inter encoding control section 30 for receiving a current image signal and the basic frame signal and discriminating whether or not a difference is to be taken by each of a plurality of macro blocks resulting from dividing a frame; and a selector 33 for receiving an output of the intra/inter encoding control section 30 and outputting the basic frame signal to the subtractor 1 when the intra/inter encoding control section 30 discriminates to take a difference or outputting zero to the subtractor 1 when the intra/inter encoding control section 30 discriminates to take no difference. COPYRIGHT: (C)2003,JPO |
申请公布号 |
JP2003264835(A) |
申请公布日期 |
2003.09.19 |
申请号 |
JP20020063116 |
申请日期 |
2002.03.08 |
申请人 |
NIPPON TELEGR & TELEPH CORP <NTT> |
发明人 |
NAKADA SHUNJI |
分类号 |
H04N19/50;H04N19/107;H04N19/137;H04N19/139;H04N19/176;H04N19/196;H04N19/423;H04N19/503;H04N19/51;H04N19/593;H04N19/61;H04N19/625;H04N19/91;(IPC1-7):H04N7/32 |
主分类号 |
H04N19/50 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|