| 发明名称 |
Unbundling, translation and rebundling of instruction bundles in an instruction stream |
| 摘要 |
Instructions in a first instruction stream are unbundled; certain unbundled instructions are translated; and the instructions are rebundled. Bundled instructions are used by processors based on Very Long Instruction Word (VLIW) and Explicitly Parallel Instruction Computing (EPIC) technology.
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| 申请公布号 |
US2003177482(A1) |
申请公布日期 |
2003.09.18 |
| 申请号 |
US20020100525 |
申请日期 |
2002.03.18 |
| 申请人 |
DINECHIN CHRISTOPHE DE |
发明人 |
DINECHIN CHRISTOPHE DE |
| 分类号 |
G06F9/45;(IPC1-7):G06F9/45 |
主分类号 |
G06F9/45 |
| 代理机构 |
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| 主权项 |
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