发明名称 Secure logic interlocking
摘要 This invention discloses a method and system for processing logic modules, each having a separate functionality, into a unique functionality that is to be executed in an interlocked mode as a unique functionality. The method is based on taking logic modules (programs and data) with known functionality and transforming them into a hidden program by integrating modules to execute together into a logic which is partially obfuscated and/or encrypted and/or physically hidden. The hidden program is being updated dynamically to strengthen it against reverse engineering efforts. The program includes the functionality for generating security signals, which are unpredictable by observers, such as a pseudo random sequence of security signals. Only elements that share the means for producing the security signals can check their validity. The modules include operational tasks and performance parameters for this operation. The operation can be transmission of data packets with given parameters of performance that the hidden program contains. The generated security signals thus assure that the correct operation was taken place and can be used to signal various cryptographic parameters as well.
申请公布号 US2003177374(A1) 申请公布日期 2003.09.18
申请号 US20020219378 申请日期 2002.08.14
申请人 YUNG MARCEL MORDECHAY;OFEK YORAM 发明人 YUNG MARCEL MORDECHAY;OFEK YORAM
分类号 G06F9/00;G06F11/30;H04L9/00;H04L12/56;H04L29/06;(IPC1-7):G06F11/30 主分类号 G06F9/00
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