发明名称 High-efficiency circuit for demodulating carriers in quadrature
摘要 A demodulation circuit for demodulating a received signal including carriers in quadrature modulated by digital signals and/or in which the processing is performed on two carriers in quadrature. The circuit includes a demodulator, an analog-to-digital converter, a correcting circuit, and a derotator. The correcting circuit provides signals to the derotator based on the derotator output signals and on signals provided by the analog-to-digital converter.
申请公布号 US2003174016(A1) 申请公布日期 2003.09.18
申请号 US20030389508 申请日期 2003.03.14
申请人 MEYER JACQUES 发明人 MEYER JACQUES
分类号 H03D3/00;H04L27/00;H04L27/38;(IPC1-7):H03D3/00;H04L27/22 主分类号 H03D3/00
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