| 摘要 |
A graphics system includes a hardware accelerator (HA) and a frame buffer (FB). The FB includes a sample storage area and a double-buffered display area. The HA is operable to (a) render a stream of primitives into samples, (b) store the samples into the sample storage area, (c) read and filter the samples from the sample storage area based on a programmable sample density to generate pixels, and (d) store the pixels into a first buffer of the display area. The hardware accelerator is operable to perform (a), (b), (c) and (d) one or more times on one or more corresponding streams of primitives to render an animation frame before passing control of the first buffer to an output process. In addition, a host computer may compute a maximum achievable sample density DMAX for the HA in response a change in window size, and update the HA accordingly. <IMAGE> <IMAGE> <IMAGE> <IMAGE>
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