发明名称 |
Signal sampling circuits, systems, and methods |
摘要 |
A circuit samples a voltage on a simultaneous bi-directional bus, and subtracts an outbound voltage to determine an inbound voltage. Sampling capacitors are variable to adjust for matching time constants. A mechanism is provided to sample error voltages over clock phase variations and sampling capacitor values.
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申请公布号 |
US6621323(B1) |
申请公布日期 |
2003.09.16 |
申请号 |
US20020131443 |
申请日期 |
2002.04.24 |
申请人 |
INTEL CORPORATION |
发明人 |
CASPER BRYAN K.;MARTIN AARON K.;MOONEY STEPHEN R.;JAUSSI JAMES E. |
分类号 |
G11C27/02;H04L5/14;H04L25/02;(IPC1-7):H03K17/30 |
主分类号 |
G11C27/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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