发明名称 Method for controlling critical dimension in a polycrystalline silicon emitter and related structure
摘要 According to a disclosed embodiment, an etch stop layer is fabricated on top of a base. For example, the etch stop layer can be silicon oxide fabricated on top of the base of a silicon-germanium heterojunction bipolar transistor. An amorphous layer is then formed on top of the etch stop layer. For example, the amorphous layer can be formed of a silicon amorphous layer. An opening is then etched in the amorphous layer and the etch stop layer. For example, a dry etch can be used to etch the amorphous layer, and hydrogen fluoride can be used to etch the silicon oxide etch stop layer. The opening is etched with an opening width substantially equal to a critical dimension. For example, control can be achieved over the width of the etching by limiting the thickness of the etch stop layer, and adding silicon oxynitride antireflective coating on the amorphous layer prior to patterning photoresist. The opening with opening width substantially equal to a critical dimension is then filled with a polycrystalline emitter. The resulting polycrystalline emitter has an emitter width substantially equal to the critical dimension. The polycrystalline emitter can comprise, for example, polycrystalline silicon. Moreover, a polycrystalline emitter structure can be fabricated, in which the critical dimension, i.e. the emitter width, is precisely controlled. The result is a polycrystalline emitter structure which is substantially as small as the resolution that the photolithography process would allow. For example, the polycrystalline silicon emitter of a heterojunction bipolar transistor can be formed.
申请公布号 US6620732(B1) 申请公布日期 2003.09.16
申请号 US20000721551 申请日期 2000.11.17
申请人 NEWPORT FAB, LLC 发明人 SCHUEGRAF KLAUS F.
分类号 H01L21/331;(IPC1-7):H01L21/302 主分类号 H01L21/331
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