Characterization of barrier layers in integrated circuit interconnects

摘要

A test structure and method for testing a semiconductor material is provided with a semiconductor wafer having an electrical ground and a source of electrical potential. A conductor layer is placed over the semiconductor wafer and a semiconductor material is placed over the conductor layer. A dielectric layer is placed over the semiconductor material. Conductive top and bottom layers are placed over the dielectric layer and the bottom of the semiconductor wafer. The conductive top layer is connected to the electrical ground. The conductive bottom layer is connected to the source of electrical potential. The current flow is measured from the conductive bottom layer to the conductive top layer.