| 摘要 |
PURPOSE: A semiconductor memory device for minimizing the chip area is provided to reduce the chip area by arranging the gate circuit to connect the local input and output line and the global input and output line, a PMOS sense amplifier driving circuit and an NMOS sense amplifier driving circuit between the bit lines. CONSTITUTION: A semiconductor memory device(300) for minimizing the chip area includes a memory cell array(305) connected between the bit line(BL) and the complementary bit line(BLB), a bitline equalizer circuit(310), a PMOS sense amplifier circuit(320), a PMOS sense amplifier driving circuits(325,325-1), a transfer gate circuit(330), an NMOS sense amplifier circuit(335) and an NMOS sense amplifier driving circuits(345,345-1) for driving the NMOS sense amplifier circuit(320). The first and the second transistors(340,340-1) are arranged in such a way that the gate is placed between a bit line and an adjacent bit line in parallel to each other.
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