LOW VOLTAGE NONVOLATILE SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To provide a low voltage nonvolatile semiconductor memory device.

SOLUTION: The nonvolatile semiconductor memory device comprises a bias circuit generating bias voltage for controlling a NMOS transistor connected between a bit line and a page buffer circuit. The bias circuit generates first voltage being higher than power source voltage as the bias voltage in a pre- charge section of read-out operation, and generates second voltage being lower than power source voltage as the bias voltage in a sense section of read-out operation.

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