发明名称 SOI MOSFET JUNCTION DEGRADATION USING MULTIPLE BURIED AMORPHOUS LAYERS
摘要 <p>Various circuit devices (14, 16 and 18) incorporating junction-traversing dislocation regions (60, 64 or 66) and methods of making the same are provided. In one aspect, a method of processing is provided that includes forming an impurity region (42) in a device region (20) of a semiconductor-on-insulator substrate (12). The impurity region (42) defines a junction (56). A dislocation region (64) is formed in the device region (20) that traverses the junction, (56). The dislocation region (64) provides a pathway to neutralize charge lingering in a floating body of a device.</p>
申请公布号 WO2003075357(P1) 申请公布日期 2003.09.12
申请号 US2002040745 申请日期 2002.12.18
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