| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a data transmission mechanism between LSIs, which is capable of reducing an effect of change in an operating environment in data transmission between the LSIs without arranging a dedicated circuit inside or outside of an LSI, and avoiding occurrence of a setup error and hold error. <P>SOLUTION: In the LSI1 of data transmission side, a source clock CLK102 before being distributed in a clock tree is directly supplied to a final flip flop 107 for passing data to an output driver 108. In the LSI2 of data receiving side, a source clock CLK201 before being distributed in the clock tree is directly supplied to an initial flip flop 207 for receiving data from an input driver 206. Consequently, a delay of the clock supplied to the flip flop 107 and 207 to a system clock SYSCLK 1 is made small. <P>COPYRIGHT: (C)2003,JPO</p> |
