发明名称 PATTERN EXPOSURE METHOD AND ALIGNER
摘要 PROBLEM TO BE SOLVED: To improve products in manufacturing yield by reducing influence of irregularities in a line width of a pattern formed on a reticle so as to form the pattern having a uniform line width on a wafer, in a process of forming a prescribed pattern by transferring a pattern formed on the reticle onto the wafer by the use of photography. SOLUTION: The irregularities in the line width of the pattern formed on the reticle 6 are measured, an exposure value which sets the line width of the pattern formed on the reticle 6 equal to the desired line width of a device pattern formed on a wafer 7 is obtained, and the wafer 7 is subjected to an exposure process as the exposure value is controlled corresponding to the irregularities. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003257819(A) 申请公布日期 2003.09.12
申请号 JP20020054337 申请日期 2002.02.28
申请人 SEMICONDUCTOR LEADING EDGE TECHNOLOGIES INC 发明人 SHIMIZU HIDEO
分类号 G03F7/20;H01L21/027;(IPC1-7):H01L21/027 主分类号 G03F7/20
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