| 摘要 |
An interface apparatus includes a pulse generating unit which detects the change of reading target data and generates a start pulse, an adjusting unit which generates an adjusting signal that changes from a first signal level to a second signal level in response to the start pulse, a register unit comprising a register which fetches first reading target data synchronously with a clock when the adjusting signal is at the second signal level, and holds the data and outputs the data as second reading target data when the adjusting signal is at the first signal level, and a driver unit which outputs the first reading target data synchronously with the reading signal that is asynchronous with the clock when the adjusting signal is at the second signal level, and outputs the second reading target data synchronously with the reading signal when the adjusting signal is at the first signal level.
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