| 摘要 |
It is an objective to provide a method for selecting cells in response to input codes of a digital-to-analog converter, which distributes noise based on cyclicality of selection patterns to reduce its value, without being dependent upon the input codes. A 6-bit current output type digital-to-analog converter has 63 current source cells C01 through C63. A prime number of, or 61, current source cells are used as cyclically selected cells, that is, 61 current source cells C02-C62, ranging from the second left-most current source cell C02 to the second right-most current source cell C62, are used as cyclically selected cells. The remaining left-most current source cell C01 and right-most current source cell C63 are used as non-cyclically selected cells. The cyclically selected cells comprised of 61 current source cells are selected in response to input codes according to the DWA technique.
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