发明名称 MULTI-LAYER STRUCTURE FOR REDUCING CAPACITANCE AND MANUFACTURING METHOD THEREOF
摘要 The invention relates to a multi-layer structure used in an optical communication field and its manufacturing method in which the capacitance effect between the metal patterns of a Silicon Optical Bench (SiOB) is significantly reduced. The multi-layer structure includes a dielectric layer and conductive patterns on a semiconductor substrate, such that the conductive patterns are separated from each other, wherein the dielectric layer and upper portions of the semiconductor substrate between the conductive patterns are etched out to a predetermined thickness to effectively reduce the capacitance without changing the area or structure of the metal patterns.
申请公布号 US2003170968(A1) 申请公布日期 2003.09.11
申请号 US20020224933 申请日期 2002.08.21
申请人 KIM YU-SIK;LEE JOONG-HEE 发明人 KIM YU-SIK;LEE JOONG-HEE
分类号 H01S5/022;H01L21/20;H01L23/522;H01L27/04;(IPC1-7):H01L21/20 主分类号 H01S5/022
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