| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device whose power consumption can be lowered and whose malfunction can be prevented in a scan test. <P>SOLUTION: In a shift operation, a logic circuit 10 and a logic circuit 11 are inserted, in such a way that levels of output signals Q from a flip-flop 4 and a flip-flop 5 to be given to a combinational circuit 8 and a combined circuit 9, whose operation is not required are fixed to logic '0' or '1'. Thereby, it is possible to prevent unwanted data from being input to the combined circuits 8, 9, and it is possible to reduce a simultaneous switching place during the scan test so as to reduce power consumption. <P>COPYRIGHT: (C)2003,JPO |
