An image data processing system

摘要

An image data processor (83) comprising a matrix operating circuit (84) for multiplying a matrix representing data by a matrix representing transformation constants in an image data normalizer for normalizing image data or inverse normalizing coded image data. The image data processor comprises first latches (310-1...310-N)) for sequentially latching data in a selected column of said matrix representing data; selectors (311-1...311-n) for selecting one of a plurality of data divisions in the data latched in the first latches for outputting sequentially selected latched data according to the data divisions; second latches 312-1...312-n) for sequentially latching the transformation constants in a row matrix corresponding to the data which is latched by the first latches; multipliers (313-1...313-n) corresponding in number to the second latches, for multiplying the transformation constants latched by the second latches by the data latched by the selectors; an adder (314) for calculating the sum of the products obtained by the multipliers; and an accumulator (315) for accumulating the sum outputted from the adder (314). When all data latched by the first latches (310-1...310-N) are zeros (0), zero (0) is outputted to the accumulator (315) without performing the matrix calculations. When the data input to the selectors (311-1...311-n) are all zeros, the selectors do not output the data and instead output the next data. Fewer multipliers are provided in comparison with a known image data processor, allowing the circuit scale to be reduced.