Method of forming a gate insulation layer for a semiconductor device by controlling the duration of an etch process, and system for accomplishing same

摘要

In one illustrative embodiment, the method comprises providing a substrate having a process layer formed thereabove, performing a wet etching process comprised of a duration parameter on the process layer to reduce a thickness of the process layer, and adjusting the duration parameter of the wet etching process if the reduced thickness of the process layer after the etching process is complete is not within acceptable limits. In another illustrative embodiment, the present invention is directed to a system that is comprised of an etch tool for performing an etching process for a duration on a process layer formed above a semiconducting substrate to reduce a thickness of the process layer, and a controller for adjusting the duration of the etching process if the reduced thickness of the process layer after the etching process is performed is not within acceptable limits.