发明名称 |
Area efficient, sequential gray code to thermometer code decoder |
摘要 |
A Sequential Gray Code to Thermometer Code decoder circuit adapted for area efficient use at each pad of an integrated circuit chip for incrementally adjusting a digitally adjustable resistance for continuous or periodic adjustment of on-chip terminations. The sequential decoder for decoding a Gray code count to a T-bit Thermometer code count is constructed of a plurality (T) of cascaded decoder cells, each cell sensing the state of only one bit of the Gray code count. The decoder cells are cascaded to from decoding-latching stages each stage responsive to an individual one of single-bit changes between consecutive counts in the Gray code. Each stage contains a decoding-latching circuit adapted to detecting and latching the occurrence of one single-bit change in the Gray code.
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申请公布号 |
US6617986(B2) |
申请公布日期 |
2003.09.09 |
申请号 |
US20010682449 |
申请日期 |
2001.09.04 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
CONNOR JOHN;HANSEN PATRICK R.;LESCHUK STEVEN;ROTELLA JASON E. |
分类号 |
H03M7/16;(IPC1-7):H03M7/04 |
主分类号 |
H03M7/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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