| 发明名称 |
Method for evaluating decoupling capacitor placement for VLSI chips |
| 摘要 |
A method of evaluating decoupling capacitor placement for Very Large Scale Integrated Chips (VLSI) is disclosed. Included in the method is an analysis of the usage for each decoupling capacitor, the distance from the devices, and the locations of the devices and decoupling capacitors. Also addressed are the orientations and size of the components.
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| 申请公布号 |
US6618844(B2) |
申请公布日期 |
2003.09.09 |
| 申请号 |
US20010896270 |
申请日期 |
2001.06.29 |
| 申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
DANSKY ALLAN H.;BECKER WIREN D.;SMITH HOWARD H.;CAMPORESE PETER J.;ENG KWOK FAI;HOFFMAN DALE E.;SINGH BHUPINDRA |
| 分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
| 代理机构 |
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