发明名称 Gate array with border element
摘要 A gate array comprises a core cell having a plurality of logic gates, a power supply pattern provided beside the core cell for providing electrical power to the core cell, and a border element provided beside the power supply pattern for providing capacitance or resistance to the core cell. The border element has a capacity cell including a transistor that provides the capacitance to the core cell, a resistor cell including a transistor that provides resistance to the core cell, and a material having resistance to be provided to the core cell.
申请公布号 US6617620(B1) 申请公布日期 2003.09.09
申请号 US19990406850 申请日期 1999.09.29
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 KAWANO HARUMI;TAKAHASHI KATSUYOSHI
分类号 H01L27/118;(IPC1-7):H01L27/10 主分类号 H01L27/118
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