发明名称 Quasi-damascene gate, self-aligned source/drain methods for fabricating devices
摘要 Methods for use in fabricating integrated circuit structures. One embodiment of the present invention is a quasi-damascene gate, self-aligned source/drain method for forming a device on a substrate that includes steps of: (a) forming a gate dielectric layer over the substrate; (b) forming a first gate electrode layer over the gate dielectric layer; (c) forming a contact etch stop layer over the first gate electrode layer; (d) forming a self-aligning layer over the contact etch stop layer; and (e) forming and patterning a mask over the self-aligning layer.
申请公布号 US6617216(B1) 申请公布日期 2003.09.09
申请号 US20020117575 申请日期 2002.04.04
申请人 APPLIED MATERIALS, INC 发明人 HU HUNG-KWEI
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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