发明名称 Analog pre-processor with improved input common mode range
摘要 An analog circuit 20 includes an amplifier 30 with a positive input node, a negative input node, a positive output node and a negative output node. A first capacitor 32 is coupled between the negative input node and an analog signal node. A second capacitor 34 is coupled between the positive input node and a reference voltage node. In addition, a third capacitor 36 is coupled between the positive input node and the negative output node and a fourth capacitor 38 is coupled between the negative input node and the positive output node. A first switch 40 is coupled between the third capacitor 36 and the negative output node and a second switch 42 is coupled between the fourth capacitor 38 and the positive output node. An inverter coupled to the analog signal node drives common mode capacitors coupled between the output of the inverter and the respective negative and positive input nodes.
申请公布号 US6617567(B2) 申请公布日期 2003.09.09
申请号 US20010888201 申请日期 2001.06.22
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 MUKHERJEE SUBHASHISH;PENTAKOTA VISVESVARAYA
分类号 H03F3/00;H03F3/45;H04N5/335;H04N5/355;H04N5/369;(IPC1-7):H01J40/14 主分类号 H03F3/00
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